Zehong Yu 喻泽弘

PhD student
School of Software, Tsinghua University
Room 11-301, East-Main Building Tsinghua University, Beijing
Email: yzhddding@gmail.com

About Me

My name is Zehong Yu. I am a PhD student at the Software System Security Assurance Group at Tsinghua University since September 2024, under the tutelage of Prof. Yu Jiang, currently. Before that, I received my bachelor degree from Southeast University in 2021 and master degree from Tsinghua University in 2024.

Currently, my research focuses on hardware security, particularly processor fuzzing and vulnerability detection, and model-driven development to enhance the efficiency and reliability of critical systems, including aerospace and automotive applications. In addition, I am also interested in EDA and AI for Software Engineering (AI4SE).

Selected Publications

Security ’26

DRVFuzz: Data-Sensitive RISC-V CPU Fuzzing

Zehong Yu, Yuanliang Chen, Zhen Yan, Xudong Zhang, Zhensheng Xian, and Yu Jiang

The 35th USENIX Security Symposium 2026

Bib PDF CCF-A

@article{yu2026DRVFuzz,
  author = {Yu, Zehong and Chen, Yuanliang and Yan, Zhen and Zhang, Xudong and Xian, Zhensheng and Jiang, Yu},
  journal = {The 35th USENIX Security Symposium},
  title = {DRVFuzz: Data-Sensitive RISC-V CPU Fuzzing},
  year = {2026},
  ccf_rank = {CCF-A},
}

TCAD ’26

MFRODO: Efficient and Memory-Sensitive Simulink Code Generation via Redundancy Elimination

Zehong Yu, Yixiao Yang, Zhuo Su, Haowei Qiu, Rui Wang, Aiguo Cui, Shu Zhan, and Yu Jiang

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 2026

Bib PDF CCF-A

@article{yu2026MFrodo,
  author = {Yu, Zehong and Yang, Yixiao and Su, Zhuo and Qiu, Haowei and Wang, Rui and Cui, Aiguo and Zhan, Shu and Jiang, Yu},
  journal = {IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems},
  title = {MFRODO: Efficient and Memory-Sensitive Simulink Code Generation via Redundancy Elimination},
  year = {2026},
  keywords = {Simulink Models, Data-Intensive, Efficient, Memory-Sensitive, Code Generation},
  ccf_rank = {CCF-A},
}

ICSE ’26

Synthesizing Hardware-Specific Instructions for Efficient Code Generation of Simulink

Zehong Yu, Zhuo Su, Wang Rui, and Yu Jiang

In 48th International Conference on Software Engineering 2026

Bib PDF CCF-A

@inproceedings{yu2026AMICA,
  author = {Yu, Zehong and Su, Zhuo and Rui, Wang and Jiang, Yu},
  title = {Synthesizing Hardware-Specific Instructions for Efficient Code Generation of Simulink},
  year = {2026},
  isbn = {},
  publisher = {},
  address = {},
  url = {},
  doi = {},
  booktitle = {48th International Conference on Software Engineering},
  articleno = {},
  numpages = {},
  keywords = {Simulink, Code Generation, Hardware-Specific Instructions},
  location = {Rio de Janeiro, Brazil},
  series = {ICSE '26},
  ccf_rank = {CCF-A},
}

TCAD ’25

Knight: Optimizing Code Generation for Simulink Models With Loop Reshaping

Zehong Yu, Yixiao Yang, Zhuo Su, Rui Wang, Yang Tao, and Yu Jiang

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 2025

Bib PDF CCF-A

@article{yu2025Knight,
  author = {Yu, Zehong and Yang, Yixiao and Su, Zhuo and Wang, Rui and Tao, Yang and Jiang, Yu},
  journal = {IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems},
  title = {Knight: Optimizing Code Generation for Simulink Models With Loop Reshaping},
  year = {2025},
  volume = {44},
  number = {2},
  pages = {444-457},
  keywords = {Codes;Software packages;Analytical models;Semantics;Generators;Data models;Switches;Simulink Models;Loop-Semantic;Code Generation},
  doi = {10.1109/TCAD.2024.3438691},
  ccf_rank = {CCF-A},
}

DAC ’24

Efficient Code Generation for Data-Intensive Simulink Models via Redundancy Elimination

Zehong Yu, Zhuo Su, Yu Jiang, Aiguo Cui, and Rui Wang

In Proceedings of the 61st ACM/IEEE Design Automation Conference 2024

Bib PDF CCF-A

@inproceedings{yu2024Frodo,
  author = {Yu, Zehong and Su, Zhuo and Jiang, Yu and Cui, Aiguo and Wang, Rui},
  title = {Efficient Code Generation for Data-Intensive Simulink Models via Redundancy Elimination},
  year = {2024},
  isbn = {9798400706011},
  publisher = {Association for Computing Machinery},
  address = {New York, NY, USA},
  url = {https://doi.org/10.1145/3649329.3656217},
  doi = {10.1145/3649329.3656217},
  booktitle = {Proceedings of the 61st ACM/IEEE Design Automation Conference},
  articleno = {20},
  numpages = {6},
  location = {San Francisco, CA, USA},
  series = {DAC '24},
  ccf_rank = {CCF-A},
}

EMSOFT ’22

Mercury: Instruction Pipeline Aware Code Generation for Simulink Models

Zehong Yu, Zhuo Su, Yixiao Yang, Jie Liang, Yu Jiang, Aiguo Cui, Wanli Chang, and Rui Wang

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 2022

Bib PDF CCF-A

@article{yu2022mercury,
  title = {Mercury: Instruction Pipeline Aware Code Generation for Simulink Models},
  author = {Yu, Zehong and Su, Zhuo and Yang, Yixiao and Liang, Jie and Jiang, Yu and Cui, Aiguo and Chang, Wanli and Wang, Rui},
  journal = {IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems},
  volume = {41},
  number = {11},
  pages = {4504--4515},
  year = {2022},
  publisher = {IEEE},
  dimensions = {true},
  ccf_rank = {CCF-A},
}